所属单位：计算机科学与工程学院

发表刊物：MINES 2011

项目来源：自选课题

关键字：FFT；FPGA；Butterfly-calculation；Rotation-factor；Verilog HDL Introduction

摘要：This paper describes the arithmetic princple and discipline of FFT,analyzes rotation factor and data address of the node.It adopts flexible Verilog HDL to design and realize the data address unit of FFT implementation which is 64-point by radix-2.It uses Altera company's PLD software Quartus II 8.0(32 Bit) to compile and form top-level entity.

合写作者：林兴业

第一作者：宋宇

论文类型：论文集

页面范围：2

是否译文：否

发表时间：2011-11-04